The present invention is generally related to integrated circuit (IC) devices having programmable polysilicon fuses such as programmable logic devices (PLDs), and more particularly to internal ESD protection circuits for the on chip programmable polysilicon fuses.
Integrated circuit devices typically comprise electrical components being fabricated upon a wafer substrate through a series of semiconductor processes. One such type of IC device incorporates multiple programmable polysilicon fuses that can be selectively blown i.e. rendered an open circuit, to establish an operative circuit that is configured as a function of the states of the polysilicon fuses.
These IC devices are often powered by at least one voltage supply, and usually have a second input voltage control pin adapted to receive a high voltage signal during a programming mode, which may exceed 40 volts direct current (DC) in a conventional implementation. Most programmable integrated circuits have the ability to allow for the electronic reading of the polysilicon fuse states by providing a read signal, such as a voltage to a read input, allowing one to ascertain the state of the polysilicon fuses and thus the configuration of the circuit.
One primary problem with most conventional schemes is the need to read the polysilicon fuse states using a low voltage signal down to as low as about 6 volts DC. Most conventional circuits need enough voltage headroom to work which hampers the ability to reliability read the state of the fuses. A second problem is the need to operate under xe2x80x9chigh voltagexe2x80x9d conditions, which can raise the power supply rail to at least 40 volts.
There are not many prior art polysilicon fuse programming circuits that need to work over such extreme voltages. One known solution uses long channel MOSFET devices providing a relatively constant pull down current to programming switch devices. The long channel MOSFET is added from switches gate to ground. However, these devices pull-down voltages to operating circuitry all the time, whereby this constant pull-down voltages reduces the speed at which switches used to blow the polysilicon fuses is reduced. Moreover, these pull-down circuits often can not discharge the gate of MOSFETS fast enough during a transient to the operating voltage supply, which consequently allows possible damaging the polysilicon fuses or accidently blowing the fuses, and perhaps rendering the integrated circuit in an unintentional or inoperable circuit configuration.
Integrated circuits are often provided with electrostatic discharge (ESD) circuitry adapted to respond to transient voltages i.e. voltage spikes on the supply voltages provided to the IC circuit. However, prior art solutions for programmable IC devices, such as programmable logic devices (PLDs) are often times inadequate and slow, or, are not adapted to operate over extreme voltage ranges.
What is desired is an integrated circuit having programmable fuses that has an ESD circuit to prevent damage to the on-die fuses, but still allows the on-die programming mode to work, eliminating the chance of damaging the on-die fuse, such as a polysilicon fuse. Such circuitry would be adapted to allow reading the state of the fuses down to about 6 volts, but which is also adapted to operate at power supply voltages of up to 40 volts.
The present invention achieves technical advantages as an electrostatic discharge (ESD) circuit adapted to disable programming circuitry for on-die fuses upon the detection of a voltage transient on a voltage supply operating the integrated circuit. The present invention achieves technical advantages by quickly determining a voltage transient i.e. voltage spike on the voltage supply, and quickly turning off programming circuitry before fuses coupled thereto can be damaged or inadvertently blown. The present invention achieves this function by providing for an ultra-fast switch that maintains programming switching off in response to detecting the voltage transient on the voltage supply.
According to a first embodiment, the present invention comprises an ESD circuit comprising a fuse coupled to a voltage potential. A control device is coupled to the fuse, and is adapted to selectively blow the fuse in response to a first control signal. The protection circuit is provided and coupled to the control device and is adapted to responsively disable the control device in response to a voltage transient residing on the voltage potential. The control device preferably comprises a first switch that is susceptible to being momentarily turned on when the voltage transient resides on the voltage potential without the protection circuit. The first and second switch both preferably comprise a MOSFET device.
The protection circuit preferably comprises a second switch being coupled to the voltage potential, where advantageously, the second switch is adapted to turn on quicker than the first switch to maintain the first switch off, preventing any fuses from being blown during the transient on the voltage supply. The second switch preferably comprises a MOSFET having a gate, source and drain, further comprising a capacitor coupled across the gate and drain and coupled to the voltage potential. This capacitor capacitively couples more charge to the second switch than the charge coupled to the first switch, this capacitor having more capacitance than the parasitic capacitance inherently defined across the MOSFET of the programming circuit. According to the present invention, there is provided a third switch responsively coupled to the second switch and controllable coupled to the first switch. In the preferred embodiment, the fuses comprise of polysilicon fuses, but can be comprised of other materials as desired and suitable for the particular implementation.
The circuit further preferably comprises a read circuit coupled to the fuse and adapted to read a state of the fuse in response to a read control signal. This read circuit comprises a fourth switch coupled between the fuse and a read output node. At least one zener diode, is preferably coupled between the second switch and ground to protect a gate oxide of the second switch forming a portion of the protection circuit. The ESD device is adapted to operate at a voltage potential being between 6 volts and 40 volts, allowing the state of the fuses to be read at voltages as low as 6 volts, while allowing programming voltages of up to 40 volts.
According to a second embodiment of the present invention, there is provided a method of operating an integrated circuit (IC) device having an ESD circuit protecting a programmable fuse coupled to a voltage potential on an IC device. The IC device has a programming circuit coupled to the fuse for selectively blowing the fuse. The method comprises the step of responsively disabling the programming circuit in response to detecting a voltage transient on the voltage potential. The method further comprises the programming circuit having a first switch coupled to the voltage potential which is susceptible to momentarily turning on in response to the voltage transient on the voltage potential, further comprising the step of disabling the programming circuit faster than the first switch can turn on in response to the voltage transient. A second switch preferably maintains the first switch off in response to the presence of the voltage transient. The second switch is preferably a MOSFET coupled to the voltage potential, further comprising a capacitor coupled across a gate and drain of the MOSFET an d also coupled to the voltage potential allowing the second switch to turn on quicker than the first switch. The MOSFET switch of the programming circuit and the MOSFET switch of the protection circuit both preferably occupy about the same area on the die of the integrated circuit. The method is adapted to allow operation of the programming circuit at supply voltages of between 6 volts and 40 volts.